LogicSim History

Version history for LogicSim shows you how often it was updated over the past months (starting Dec 27, 2007) as well as 'what is new' information for each update (if available, since this information provided by the author).

Version: 3.3
Size: 10066KB
OS: Win XP
Description:   LogicSim is an affordable and user-friendly Verilog simulator for ASIC and FPGA design verification. It offers a powerful and easy-to-use graphical user interface that lets you quickly simulate your Verilog designs.

v 3.2 updated on Dec 27, 2007

Unknown changes

Go back to the LogicSim review

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