UrJTAG facilitates communication with flash chips, CPUs, and other systems using JTAG. This software tool enables users to interact with a range of electronic devices, making it a useful tool for testing and development.
UrJTAG is a versatile tool that facilitates communication over JTAG with flash chips, CPUs, and other types of devices. This software builds upon the established openwince jtag tools code and is currently undergoing development to transform the code base into a library, which will enable compatibility with other applications. Additionally, an adaptable remote communication protocol utilizing various serial links, including TCP/IP, is under development.
JTAG (IEEE 1149.1) is a serial interface designed to determine if connections between integrated circuits (ICs) are functioning correctly. This interface enables users to set and check the inputs and outputs of ICs efficiently, using a straightforward serial design that reduces the number of pins and logic required. With just a single input/output pin, a clock pin, and a control pin, the control machine associated with each chip can drive two internal shift registers - namely the instruction register (IR) and the data register (DR). UrJTAG presently provides users with the capability to set the IR and set/get the DR, but it does not yet facilitate direct control of the state machine.
UrJTAG supports a range of JTAG adapters/cables, such as the Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable, the Altera USB-Blaster and compatible devices, the Xilinx DLC5 JTAG Parallel Cable III, and several others. Additionally, a broad spectrum of JTAG-aware parts (chips) is supported, including the Altera EP1C20F400, the Atmel ATmega128 (partial support), the Broadcom BCM1250, the Samsung S3C4510B, the Xilinx XC2C256-TQ144, and many more.
It is worth noting that not all flash chips are supported in every possible configuration; there may exist untested combinations of bus width, chip type, and other variables. However, Intel 28FxxxJ3A (28F320J3A, 28F640J3A, 28F128J3A), Intel 28FxxxK3 (28F640K3, 28F128K3, 28F256K3), Intel 28FxxxK18 (28F640K18, 28F128K18, 28F256K18), AMD Am29LV64xD (Am29LV640D, Am29LV641D, Am29LV642D), and AMD Am29xx040B (Am29F040B, Am29LV040B) are a few flash chips currently supported by UrJTAG.
JTAG (IEEE 1149.1) is a serial interface designed to determine if connections between integrated circuits (ICs) are functioning correctly. This interface enables users to set and check the inputs and outputs of ICs efficiently, using a straightforward serial design that reduces the number of pins and logic required. With just a single input/output pin, a clock pin, and a control pin, the control machine associated with each chip can drive two internal shift registers - namely the instruction register (IR) and the data register (DR). UrJTAG presently provides users with the capability to set the IR and set/get the DR, but it does not yet facilitate direct control of the state machine.
UrJTAG supports a range of JTAG adapters/cables, such as the Altera ByteBlaster/ByteBlaster II/ByteBlasterMV Parallel Port Download Cable, the Altera USB-Blaster and compatible devices, the Xilinx DLC5 JTAG Parallel Cable III, and several others. Additionally, a broad spectrum of JTAG-aware parts (chips) is supported, including the Altera EP1C20F400, the Atmel ATmega128 (partial support), the Broadcom BCM1250, the Samsung S3C4510B, the Xilinx XC2C256-TQ144, and many more.
It is worth noting that not all flash chips are supported in every possible configuration; there may exist untested combinations of bus width, chip type, and other variables. However, Intel 28FxxxJ3A (28F320J3A, 28F640J3A, 28F128J3A), Intel 28FxxxK3 (28F640K3, 28F128K3, 28F256K3), Intel 28FxxxK18 (28F640K18, 28F128K18, 28F256K18), AMD Am29LV64xD (Am29LV640D, Am29LV641D, Am29LV642D), and AMD Am29xx040B (Am29F040B, Am29LV040B) are a few flash chips currently supported by UrJTAG.
What's New
Version 0.10: N/A